Allied-telesis SwitchBlade 4000 Series Switch Hardware Reference Manuel d'utilisateur télécharger pdf (Page 27)

Hardware Reference 27

C613-03060-00 REV H

• 64 MByte RAMBUS packet buffer, enabling traffic bursting to be

absorbed.

• Either 33 MHz or 40 MHz, depending on the speed of the master card’s

PCI bus.

Note: The suffix V2 indicates the card's silicon revision level. Certain enhanced

features, such as LACP, will only run on cards with a V2 revision level. You can also

display the silicon revision of a line card by executing the show switch instance

command (V2 revision level cards are displayed as K1). Refer to the Switching Chapter

of your SwitchBlade Software Reference for more information on using this command.

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Allied-telesis SwitchBlade 4000 Series Switch Hardware Reference Manuel d'utilisateur Page 27